#![no_std]
#![no_main]

pub mod bootloader;
pub mod flash;
pub use derive_lib::AdcInit;
pub use derive_lib::DmaConfig;
pub use derive_lib::DmaInit;
pub use derive_lib::DmaInit2;
pub use derive_lib::Gpio;
pub use derive_lib::GpioConfig;
pub use derive_lib::GpioGroup;
pub use derive_lib::PeriphReg;
pub use derive_lib::SpiConfig;
pub use derive_lib::TimDelay;
pub use derive_lib::TimPwm;
pub use derive_lib::UartInit;
pub use derive_lib::CanConfig;
pub use derive_lib::UartConfig;
pub use derive_lib::TimPwm2;
pub mod rcc;
pub mod afio;
pub use cortex_m_rt;
pub use cortex_m_rt::{entry, pre_init};
pub use stm32f1;
pub use cortex_m;

#[derive(PeriphReg)]
#[periph(periph = "RCC")]
pub struct RCC;

#[derive(PeriphReg)]
#[periph(periph = "AFIO")]
pub struct AFIO;

#[derive(PeriphReg)]
#[periph(periph = "SPI1")]
pub struct SPI1;


// #[derive(TimPwm2)]
// #[pwm(init = "pwm_init", tim = "TIM3", psc = 71, arr = 1000,
//     ch(name = "t1", ch = 2, mode = 1),
//     ch(name = "T2", ch = 4, mode = 1)
// )]
// pub struct T;

// #[derive(UartConfig)]
// #[uart(uart = 4, baud_rate = 115200, init = "Config")]
// pub struct T;

// #[derive(CanConfig)]
// #[can(init = "can_init", baud_rate = 500000, fb_count = 1)]
// pub struct T;

// impl T {
//     const FB0_MASK: u32 = 0;
//     const FB0_VALUE: u32 = 1;
//     const FB1_MASK: u32 = 2;
//     const FB1_VALUE: u32 = 3;
// }

// #[derive(Debug, GpioConfig, DmaConfig, PeriphReg, TimDelay, TimPwm, SpiConfig)]
// #[pwm(init = "pwm_init", tim = "TIM1", freq = 10000, set_freq, enable, disable,
//     ch(ch = 1, duty = 50, mode = 1, set_duty),
//     ch(ch = 3, duty = 60, mode = 2),
//     ch(ch = 2, duty = 20, mode = 1),
// )]
// #[delay(tim = "TIM6", init = "delay_init", us = "delay_us")]
// #[periph(periph = "USART1")]
// #[derive(GpioConfig)]
// #[gpio(
//     init = "gpio_init",
//     io(name = "led", io = "PA13", mode = "OUT_PP", set, reset, toggle),
//     io(name = "led2", io = "PB0", mode = "OUT_PP", set, reset, toggle),
//     io(name = "key", io = "PC0", mode = "IN_UP", read, exti_down),
//     io(name = "key2", io = "PC1", mode = "IN_DOWN", read, exti_down),
//     io(name = "uart_tx", io = "PA9", mode = "AF_PP"),
//     io(name = "uart_rx", io = "PA10", mode = "IN_FLOAT")
// )]
// #[dma(
//     init = "dma_init",
//     ch(name = "usart1_tx", dma = 1, ch = 2, size = 8, dir = "write", tcie),
//     ch(name = "usart1_rx", dma = 2, ch = 3, size = 8, dir = "read", circ)
// )]
// #[spi(
//     init = "spi_init",
//     size = 8,
//     spi = 1,
//     baud_div = 2,
//     cpol = "low",
//     cpha = "one"
// )]
// struct T;

// fn te() {
//     let exti: stm32f1::stm32f103::EXTI = unsafe { ::core::mem::transmute(()) };
//     exti.imr.modify(|_, w| {
//         w.mr0().unmasked()
//     });
//     exti.rtsr.modify(|_, w| w.tr0().enabled());
//     exti.ftsr.modify(|_, w| w.tr1().enabled());

//     let afio: stm32f1::stm32f103::AFIO = unsafe { ::core::mem::transmute(()) };
//     exti.pr.write(|w| w.pr0().clear());
// }

